x86-64 TUTORIAL: CONDITIONAL OPERATIONS WITHOUT BRANCHING
The regular JMP and conditional Jcc jump instructions change the course of
working code, the latter based on the runtime status of certain bits in the RFLAGS register. The x86 and x86-64 processors implement pipelining of
instructions where they prefetch a certain number of instructions and evaluate
them before time. The number of instructions prefetched is dependent on the
prefetch input queue (PIQ).
The Labouchere system for roulette is played as follows. Write down a list of
numbers, usually 1, 2, 3, 4. Bet the sum of the first and last, i.e. 1 + 4 = 5,
on red. If you win, delete the first and last numbers from the list. If you
lose, add the amount that you last bet to the end of the list. Then use the new
list and bet the sum of the first and last numbers (if there is only one number,
bet that amount). Continue until your list becomes empty. You will see
that, if this happens, you will always win the sum 1 + 2 + 3 + 4 = 10, of the
original list. The below program simulates this system. Execute the
program, and see if you always win!
This program does not use any fixed memory locations for the head or tail of the
link list, but uses all the registers available to it. However, for some of the
functions it does not follow the convention of saving all the registers RBX, R12-R15
on the stack at every function call since some of these registers
contain pointers to the head and tail of the link list. Even if we did that, the
program would hardly change much.